In this article, I'll show you how the GWT actually leverages its Java compatibility to make Ajax applications every bit as testable as their synchronous counterparts. 在本文中,我将向您展示GWT如何实际地利用Java兼容性,使Ajax应用程序的每个部分都能像与之对应的同步应用程序一样进行测试。
Design of DPLL for Bit Synchronous Clock Based on FPGA 基于FPGA的提取位同步时钟DPLL设计
Bit synchronous clock recover circuit is the key part of the communication system, it can exactly recover the synchronous signal from input data stream. 位同步时钟信号的提取是通信系统中的关键部分,应用数字锁相环可以准确地从输入码流中提取出位同步信号。
Then the method of using GAL to design the eight bit binary reversible synchronous counter and a kind of logic design software& CUPL language are also introduced. 同时介绍一种通用逻辑设计软件&CUPL语言.文中着重介绍了八位二进制可逆同步计数器的功能特点及其用GAL设计的方法。
First the average and worst Bit error rate ( BER) expression of QS-CDMA system was deduced, when the synchronous error is uniformly distributed within the symmetrical area. 我们首先推导出了QS-CDMA系统同步误差在对称区间上均匀分布的平均情况和最坏情况下系统误码率(BER)的表达式。
The FPGA were applied in the correlation detection and bit synchronous system of ultra_shortwave hop_frequency transceiver. 采用FPGA实现了超短波跳频电台同步系统中的相关检测及位同步系统。
The FPDP bus is a 32 bit parallel synchronous bus intended to provide high speed data transfer among multiple VME bus boards. The FPDP bus design does not allow for the transmission of address information. FPDP总线为32位的并行同步总线,提供多块VME总线板之间的高速数据传输,总线设计不允许地址信息传递。
Bit Synchronous Extracting Programme of Digital Processing for 801 H 801H机数字化处理的位同步提取方案
The bit-synchronous communication on the up-link of micro-cell CDMA Systems 在微蜂窝码分多址小区的上行链路实现比特同步的设想
The 12 bit build-in A/ D convertor is used to acquire the control signal, the capture function of Timer_A is used to get synchronous information, the PWM outputs of Timer_B are used to generate voltage wave. 采用内建的12位A/D转换器采集控制量,利用定时器A的捕获功能取得同步信息,通过定时器B的PWM输出实现波形产生。
Realization of Bit Synchronous Signal Recovery Digital Circuits 位同步信号恢复的数字电路实现
A Extension Bit Method for Parallel Frame Synchronous Scrambler 并行帧同步扰码器的扩充比特设计法
Besides, according to constellation diagram of QPSK signal and the constant mode characteristic of bit synchronization point, it puts forward a synchronous method, in which the variance of mode is the minimum; in addition, it particularly designs synchronous circuit. 针对QPSK信号的星座图以及位同步点的恒模特性,给出了位同步点模值方差最小的同步方法,并详细设计了位同步电路。
We ensure the bit synchronous digital signal through digital phase detector, and filters quantitative calculation of the local network signals and locomotives of the phase error signal to drive the local osci(?) ator signal phase adjustments. 通过数字鉴相器、量化器和滤波器计算本地信号与机车网络信号的相位误差,驱动数控振荡器调整本地信号相位保证数字信号的位同步。
The five key technologies of GPS navigation receivers are Gold code acquisition technology, Gold code tracking technology, carrier tracking technology, bit synchronous technology and frame synchronization. GPS接收机的关键技术主要有五项,依次为GOLD码捕获技术、GOLD码跟踪技术、载波跟踪技术、位同步技术和帧同步技术。